? 2004 fairchild semiconductor corporation ds005956 www.fairchildsemi.com october 1987 revised january 2004 cd4023bc buffered triple 3-input nand gate cd4023bc buffered triple 3-input nand gate general description these triple gates are monolithic complementary mos (cmos) integrated circuits constructed with n- and p- channel enhancement mode transistors. they have equal source and sink current capabilities and conform to stan- dard b series output drive. the devices also have buffered outputs which improve transfer characteristics by providing very high gain. all inputs are protected against static dis- charge with diodes to v dd and v ss . features wide supply voltage range: 3.0v to 15v high noise immunity: 0.45 v dd (typ) low power ttl compatibility: fan out of 2 driving 74l or 1 driving 74ls 5v?10v?15v parametric ratings symmetrical output characteristics maximum input leakage 1 a at 15v over full temperature range ordering code: note 1: devices also available in tape and reel. specify by appending the suffix letter ? x ? tot he ordering code. connection diagram top view block diagram 1 / 3 device shown *all inputs protected by standard cmos input protection circuit. order number package number package description cd4023bcm (note 1) m14a 14-lead small outline integrated circuit (soic), jedec ms-012, 0.150" narrow CD4023BCSJ m14d 14-lead small outline package (sop), eiaj type ii, 5.3mm wide cd4023bcn n14a 14-lead plastic dual-in-line package (pdip), jedec ms-001, 0.300" wide
www.fairchildsemi.com 2 cd4023bc absolute maximum ratings (note 2) (note 3) recommended operating conditions note 2: ? absolute maximum ratings ? are those values beyond which the safety of the device cannot be guaranteed; they are not meant to imply that the devices should be operated at these limits. the table of ? recom- mended operating conditions ? and ? electrical characteristics ? provides conditions for actual device operation. note 3: v ss = 0v unless otherwise specified. dc electrical characteristics (note 4) note 4: v ss = 0v unless otherwise specified. note 5: i oh and i ol are tested one output at a time. dc supply voltage (v dd ) ? 0.5 v dc to + 18 v dc input voltage (v in ) ? 0.5 v dc to v dd + 0.5 v dc storage temp. range (t s ) ? 65 c to + 150 c power dissipation (p d ) dual-in-line 700 mw small outline 500 mw lead temperature (t l ) (soldering, 10 seconds) 260 c dc supply voltage (v dd )5 v dc to 15 v dc input voltage (v in )0 v dc to v dd v dc operating temperature range (t a ) ? 55 c to + 125 c symbol parameter conditions ? 55 c + 25 c + 125 c units min typ min typ max min max i dd quiescent device current v dd = 5v 0.25 0.004 0.25 7.5 a v dd = 10v 0.5 0.005 0.5 15 v dd = 15v 1.0 0.006 1.0 30 v ol low level output voltage v dd = 5v 0.05 0 0.05 0.05 v v dd = 10v 0.05 0 0.05 0.05 v dd = 15v 0.05 0 0.05 0.05 v oh high level output voltage v dd = 5v 4.95 4.95 5 4.95 v v dd = 10v 9.95 9.95 10 9.95 v dd = 15v 14.95 14.95 15 14.95 v il low level input voltage v dd = 5v, v o = 4.5v 1.5 2 1.5 1.5 v v dd = 10v, v o = 9.0v |i o | < 1 a 3.0 4 3.0 3.0 v dd = 15v, v o = 13.5v 4.0 6 4.0 4.0 v ih high level input voltage v dd = 5v, v o = 0.5v 3.5 3.5 3 3.5 v v dd = 10v, v o = 1.0v |i o | < 1 a 7.0 7.0 6 7.0 v dd = 15v, v o = 1.5v 11.0 11.0 9 11.0 i ol low level output current v dd = 5v, v o = 0.4v 0.64 0.51 0.88 0.36 ma (note 5) v dd = 10v, v o = 0.5v 1.6 1.3 2.2 0.90 v dd = 15v, v o = 1.5v 4.2 3.4 8 2.4 i oh high level output current v dd = 5v, v o = 4.6v ? 0.64 ? 0.51 ? 0.88 ? 0.36 ma (note 5) v dd = 10v, v o = 9.5v ? 1.6 ? 1.3 ? 2.2 ? 0.90 v dd = 15v, v o = 13.5v ? 4.2 ? 3.4 ? 8 ? 2.4 i in input current v dd = 15v, v in = 0v ? 0.1 ? 10 ? 5 ? 0.1 ? 1.0 a v dd = 15v, v in = 15v 0.1 10 ? 5 0.1 1.0
3 www.fairchildsemi.com cd4023bc ac electrical characteristics (note 6) t a = 25 c, c l = 50 pf, r l = 200k, unless otherwise specified note 6: ac parameters are guaranteed by dc correlated testing. note 7: c pd determines the no load ac power consumption of any cmos device. for complete explanation, see family characteristics application note an-90. symbol parameter conditions min typ max units t phl propagation delay, high-to-low level v dd = 5v 130 250 ns v dd = 10v 60 100 v dd = 15v 40 70 t plh propagation delay, low-to-high level v dd = 5v 110 250 ns v dd = 10v 50 100 v dd = 15v 35 70 t thl , transition time v dd = 5v 90 200 ns t tlh v dd = 10v 50 100 v dd = 15v 40 80 c in average input capacitance any input 5 7.5 pf c pd power dissipation capacity (note 7) any gate 17 pf
www.fairchildsemi.com 4 cd4023bc physical dimensions inches (millimeters) unless otherwise noted 14-lead small outline integrated circuit (soic), jedec ms-012, 0.150" narrow package number m14a
5 www.fairchildsemi.com cd4023bc physical dimensions inches (millimeters) unless otherwise noted (continued) 14-lead small outline package (sop), eiaj type ii, 5.3mm wide package number m14d
www.fairchildsemi.com 6 cd4023bc buffered triple 3-input nand gate physical dimensions inches (millimeters) unless otherwise noted (continued) 14-lead plastic dual-in-line package (pdip), jedec ms-001, 0.300" wide package number n14a fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and fairchild reserves the right at any time without notice to change said circuitry and specifications. life support policy fairchild ? s products are not authorized for use as critical components in life support devices or systems without the express written approval of the president of fairchild semiconductor corporation. as used herein: 1. life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be rea- sonably expected to result in a significant injury to the user. 2. a critical component in any component of a life support device or system whose failure to perform can be rea- sonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com
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